Theses most similar to Use of high-level design information for enabling automation of fine-grained power gating (Agarwal, Abhinav; 2014) read it

High level compilation for gate reconfigurable architectures

Babb, Jonathan William (2001)

  • Advisor: Anant Agarwal
  • Department of Electrical Engineering and Computer Science
Read it

Microprocessor energy characterization and optimization through fast, accurate, and flexible simulation

Krashinsky, Ronny (Ronny Meir), 1978- (2001)

  • Advisor: Krste Asanović
  • Department of Electrical Engineering and Computer Science
Read it

Tiled microprocessors

Taylor, Michael Bedford, 1975- (2007)

  • Advisor: Anant Agarwal
  • Department of Electrical Engineering and Computer Science
Read it

Low power ROM generation

Chou, Paul L. (Paul Lee) (1996)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
Read it

Control and application of a pixel-parallel image processing system

Hall, Gary (1997)

  • Advisor: Charles G. Sodini
  • Department of Electrical Engineering and Computer Science
Read it

An I/O port controller for the MAP chip

Ma, Albert (1997)

  • Advisor: William J. Dally
  • Department of Electrical Engineering and Computer Science
Read it

Circuit design for logic automata

Chen, Kailiang (2009)

  • Advisor: Neil Gershenfeld
  • Department of Electrical Engineering and Computer Science
Read it

ALA ASIC : a standard cell library for Asynchronous Logic Automata

Green, Forrest Oliver Reece (2010)

  • Advisor: Neil Gershenfeld
  • Department of Electrical Engineering and Computer Science
Read it

SIFt : a compiler for streaming applications

Waingold, Elliot L. (Elliot Lee), 1977- (2000)

  • Advisor: Saman Amarasinghe
  • Department of Electrical Engineering and Computer Science
Read it

Synthesis of multi-cycle circuits from guarded atomic actions

Karczmarek, Michal, 1977- (2011)

  • Advisor: Arvind
  • Department of Electrical Engineering and Computer Science
Read it