Theses most similar to Reducing instruction cache energy using gated wordlines (Panich, Mukaya, 1975-; 1999) read it
- Advisor: Krste AsanoviÄ
- Department of Electrical Engineering and Computer Science
Microprocessor energy characterization and optimization through fast, accurate, and flexible simulation
Krashinsky, Ronny (Ronny Meir), 1978- (2001)
- Advisor: Krste AsanoviÄ
- Department of Electrical Engineering and Computer Science
- Advisor: William J. Dally
- Department of Electrical Engineering and Computer Science
Design and implementation of the integer unit datapath of the MAP cluster of the M-machine
Gupta, Parag (1996)
- Advisor: William J. Dally
- Department of Electrical Engineering and Computer Science
- Advisor: Anantha P. Chandrakasan
- Department of Electrical Engineering and Computer Science
- Advisor: Anantha P. Chandrakasan
- Department of Electrical Engineering and Computer Science
- Advisor: Charles G. Sodini
- Department of Electrical Engineering and Computer Science
- Advisor: William J. Dally
- Department of Electrical Engineering and Computer Science
- Advisor: Krste AsanoviÄ
- Department of Electrical Engineering and Computer Science
Store Buffers : implementing single cycle store instructions in write-through, write-back and set associative caches
Nagpal, Radhika (1994)
- Advisor: Anant Agarwal
- Department of Electrical Engineering and Computer Science