Theses most similar to Floating point multiply/add unit for the M-machine node processor (Hartman, Daniel K; 1996) read it
Hardware implementation of a low-power two-dimensional discrete cosine transform
Shah, Rajul R. (Rajul Ramesh), 1979- (2002)
- Advisors: Anantha P. Chandrakasan; Richard E. Anderso
- Department of Electrical Engineering and Computer Science
A power reduction algorithm for combinatorial CMOS circuits using input disabling
Rinderknecht, William John (1994)
- Advisor: Srinivas Devadas
- Department of Electrical Engineering and Computer Science
- Advisor: Krste AsanoviÄ
- Department of Electrical Engineering and Computer Science
Design and implementation of the integer unit datapath of the MAP cluster of the M-machine
Gupta, Parag (1996)
- Advisor: William J. Dally
- Department of Electrical Engineering and Computer Science
- Advisor: Thomas F. Knight, Jr., Gerald Jay Sussma
- Department of Electrical Engineering and Computer Science
- Advisor: Anantha P. Chandrakasan
- Department of Electrical Engineering and Computer Science
- Advisor: Charles G. Sodini
- Department of Electrical Engineering and Computer Science
- Advisor: Anantha P. Chandrakasan
- Department of Electrical Engineering and Computer Science
Analysis and design considerations for high performance caches
Ruan, Helen H. (Helen Hui), 1974- (1998)
- Advisor: Thomas F. Knight, Jr., Gerald Jay Sussma
- Department of Electrical Engineering and Computer Science
- Advisor: Anantha P. Chandrakasan
- Department of Electrical Engineering and Computer Science