Theses most similar to Store Buffers : implementing single cycle store instructions in write-through, write-back and set associative caches (Nagpal, Radhika; 1994) read it

The SCALE DRAM subsystem

Pharris, Brian S. (Brian Scott), 1978- (2004)

  • Advisor: Krste Asanović
  • Department of Electrical Engineering and Computer Science
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ADAM : a decentralized parallel computer architecture featuring fast thread and data migration and a uniform hardware abstraction

Huang, Andrew S. (Andrew Shane) (2002)

  • Advisor: Thomas F. Knight, Jr., Gerald Jay Sussma
  • Department of Electrical Engineering and Computer Science
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The Extreme Benchmark Suite : measuring high-performance embedded systems

Gerding, Steven (Steven Bradley) (2005)

  • Advisor: Krste Asanović
  • Department of Electrical Engineering and Computer Science
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Reptile : a distributed ILP compiler

Bratt, Ian (Ian R.) (2005)

  • Advisor: Anant Agarwal
  • Department of Electrical Engineering and Computer Science
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Effective parallel computation on workstation cluster with a user-level communication network

Hoe, James C. (James Chu-Yue) (1994)

  • Advisor: Gregory M. Papadopoulos
  • Department of Electrical Engineering and Computer Science
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Maps : a compiler-managed memory system for software-exposed architectures

Barua, Rajeev K. (Rajeev Kumar) (2000)

  • Advisors: Anant Agarwal; Saman Amarasinghe
  • Department of Electrical Engineering and Computer Science
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Banked microarchitectures for complexity-effective superscalar microprocessors

Tseng, Jessica Hui-Chun, 1977- (2006)

  • Advisor: Krste Asanović
  • Department of Electrical Engineering and Computer Science
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Microprocessor energy characterization and optimization through fast, accurate, and flexible simulation

Krashinsky, Ronny (Ronny Meir), 1978- (2001)

  • Advisor: Krste Asanović
  • Department of Electrical Engineering and Computer Science
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Reducing exception management overhead with software restart markers

Hampton, Mark Jerome, 1977- (2008)

  • Advisor: Krste Asanović
  • Department of Electrical Engineering and Computer Science
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Software orchestration of instruction level parallelism on tiled processor architectures

Lee, Walter (Walter Cheng-Wan) (2005)

  • Advisors: Anant Agarwal; Saman Amarasinghe
  • Department of Electrical Engineering and Computer Science
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