Theses most similar to those of author Clough, Andrew Lawrence

Increasing adder efficiency by exploiting input statistics (2007) read it

Design of a 3-dimension FPGA

Lajevardi, Payam (2005)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
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Fast Fourier transform on a 3D FPGA

Basha, Elizabeth (Elizabeth Ann) (2005)

  • Advisor: Krste Asanović
  • Department of Electrical Engineering and Computer Science
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Simulation of massively parallel SIMD architectures using FPGA support

Kutscha, Timothy N. (Timothy Norman) (1994)

  • Advisor: Thomas F. Knight, Jr., Gerald Jay Sussma
  • Department of Electrical Engineering and Computer Science
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Floating point multiply/add unit for the M-machine node processor

Hartman, Daniel K (1996)

  • Advisor: William J. Dally
  • Department of Electrical Engineering and Computer Science
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TSFPGA, a time-switched field-programmable gate array

Chen, Derrick (1996)

  • Advisor: Thomas F. Knight, Jr., Gerald Jay Sussma
  • Department of Electrical Engineering and Computer Science
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Circuit designs for the MAP chip

Chen, Andrew R. (Andrew Raymond) (1997)

  • Advisor: William J. Dally
  • Department of Electrical Engineering and Computer Science
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Analysis and design considerations for high performance caches

Ruan, Helen H. (Helen Hui), 1974- (1998)

  • Advisor: Thomas F. Knight, Jr., Gerald Jay Sussma
  • Department of Electrical Engineering and Computer Science
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Fault tolerant, low voltage SRAM design

Sinangil, Yildiz (2010)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
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Low-energy radix-2 serial and parallel FFT designs

Zhang, DongNi (2013)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
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Architectural implications of bit-level computation in communication applications

Wentzlaff, David, 1979- (2002)

  • Advisor: Anant Agarwal
  • Department of Electrical Engineering and Computer Science
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