Theses most similar to A low-power 32 bit datapath design (Heo, Seongmoo, 1977-; 2000) read it

Cell-based array for deep sub-micron technologies

Oey, James Boe-Kian, 1980- (2003)

  • Advisor: Christopher J. Terman
  • Department of Electrical Engineering and Computer Science
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Design of a 3-dimension FPGA

Lajevardi, Payam (2005)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
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Circuits for high-performance low-power VLSI logic

Ma, Albert (2006)

  • Advisor: Krste Asanović
  • Department of Electrical Engineering and Computer Science
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A sub-threshold cell library and methodology

Kwong, Joyce Y. S. (Joyce Yui Si) (2006)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
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Characterization of hot-carrier reliability in analog sub-circuit design

Le, Huy X. P (1996)

  • Advisor: James E. Chung
  • Department of Electrical Engineering and Computer Science
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Design and analysis of reconfigurable analog system

Lajevardi, Payam (2011)

  • Advisors: Anantha P. Chandrakasan; Hae-Seung Lee
  • Department of Electrical Engineering and Computer Science
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Analysis and characterization of random skew and jitter in a novel clock network

Gutnik, Vadim (2000)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
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Circuit techniques for subthreshold leakage reduction in a deep sub-micron process

Calhoun, Benton H. (Benton Highsmith), 1978- (2002)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
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ZOOM : a performance-energy cache simulator

Sam, Regina, 1978- (2003)

  • Advisor: Krste Asanović
  • Department of Electrical Engineering and Computer Science
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Predictive models for power dissipation in optical transceivers

Butler, Katherine, 1981- (2004)

  • Advisor: Rohatgi, Rajeev Rajan
  • Department of Electrical Engineering and Computer Science
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