Theses most similar to Latency reduction techniques in chip multiprocessor cache systems (Zhang, Michael Ruogu, 1977-; 2006) read it
Banked microarchitectures for complexity-effective superscalar microprocessors
Tseng, Jessica Hui-Chun, 1977- (2006)
- Advisor: Krste AsanoviÄ
- Department of Electrical Engineering and Computer Science
Globally Synchronized Frames for guaranteed Quality-of-Service in shared memory systems
Lee, Jae Woo (2009)
- Advisors: Jammalamadaka, Arvind K. (Arvind Kumar), 1981-; Krste AsanoviÄ
- Department of Electrical Engineering and Computer Science
Ordered Mesh Network Interconnect (OMNI) : design and implementation of in-network coherence
Subramanian, Suvinay (2013)
- Advisor: Li-Shiuan Peh
- Department of Electrical Engineering and Computer Science
- Advisor: Li-Shiuan Peh
- Department of Electrical Engineering and Computer Science
Directoryless shared memory architecture using thread migration and remote access
Shim, Keun Sup (2014)
- Advisor: Srinivas Devadas
- Department of Electrical Engineering and Computer Science
- Advisor: Srinivas Devadas
- Department of Electrical Engineering and Computer Science
- Advisor: Srinivas Devadas
- Department of Electrical Engineering and Computer Science
Software orchestration of instruction level parallelism on tiled processor architectures
Lee, Walter (Walter Cheng-Wan) (2005)
- Advisors: Anant Agarwal; Saman Amarasinghe
- Department of Electrical Engineering and Computer Science
- Advisor: Arvind
- Department of Electrical Engineering and Computer Science
- Advisors: Arvind; Larry Rudolph
- Department of Electrical Engineering and Computer Science