Theses most similar to those of author Chen, Chia-Hsi

On-Chip Network exploration and synthesis (2012) read it

High-speed, economical design implementation of transit network router

Hara, Kazuhiro (1995)

  • Advisor: Thomas F. Knight, Jr., Gerald Jay Sussma
  • Department of Electrical Engineering and Computer Science
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An energy efficient AES engine with DPA-resistance

Chung, Hye Won (2009)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
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ATAC : A 1000-core cache coherent processor with on-chip optical network

Kurian, George, Ph, D. (2010)

  • Advisor: Anant Agarwal
  • Department of Electrical Engineering and Computer Science
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Energy-aware network coding circuit and system design

Angelopoulos, Georgio (2011)

  • Advisors: Anantha P. Chandrakasan; Médard, Muriel
  • Department of Electrical Engineering and Computer Science
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Low-swing signaling for energy efficient on-chip networks

Park, Sunghyu (2011)

  • Advisors: Anantha P. Chandrakasan; Li-Shiuan Peh
  • Department of Electrical Engineering and Computer Science
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Design space exploration of photonic interconnects

Sun, Che (2011)

  • Advisor: Vladimir Stojanovic
  • Department of Electrical Engineering and Computer Science
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Low-power and application-specific SRAM design for energy-efficient motion estimation

Sinangil, Mahmut E. (Mahmut Ersin) (2012)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
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Towards low-power yet high-performance networks-on-chip

Park, Sunghyu (2014)

  • Advisors: Anantha P. Chandrakasan; Li-Shiuan Peh
  • Department of Electrical Engineering and Computer Science
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Design and implementation of low-latency, low-power reconfigurable on-chip networks

Chen, Chia-Hsi (2017)

  • Advisor: Li-Shiuan Peh
  • Department of Electrical Engineering and Computer Science
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BlueCache : a scalable distributed flash-based key-value store

Xu, Shuotao (2016)

  • Advisor: Arvind
  • Department of Electrical Engineering and Computer Science
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Design and implementation of low-latency, low-power reconfigurable on-chip networks (2017) read it

Design of a 3-dimension FPGA

Lajevardi, Payam (2005)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
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High bandwidth interchip communication for regular networks dc by Rajeevan Amirtharajah.

Amirtharajah, Rajeevan (1994)

  • Advisor: Thomas F. Knight, Jr., Gerald Jay Sussma
  • Department of Electrical Engineering and Computer Science
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Implementation issues for a packet switched routing chip

Rao, Gowri A (1994)

  • Advisor: George A. Boughton
  • Department of Electrical Engineering and Computer Science
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An optical data receiver for integrated photonic interconnects

Georgas, Michael S. (Michael Stephen) (2009)

  • Advisor: Vladimir Stojanovic
  • Department of Electrical Engineering and Computer Science
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Low-swing signaling for energy efficient on-chip networks

Park, Sunghyu (2011)

  • Advisors: Anantha P. Chandrakasan; Li-Shiuan Peh
  • Department of Electrical Engineering and Computer Science
Read it

Design space exploration of photonic interconnects

Sun, Che (2011)

  • Advisor: Vladimir Stojanovic
  • Department of Electrical Engineering and Computer Science
Read it

On-Chip Network exploration and synthesis

Chen, Chia-Hsi (2012)

  • Advisor: Li-Shiuan Peh
  • Department of Electrical Engineering and Computer Science
Read it

Modular high-speed signaling for networks in HPC systems using COTS components

Chen, Peggy B. (Peggy Bing-Jen), 1977- (2000)

  • Advisor: Thomas Knight
  • Department of Electrical Engineering and Computer Science
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Analysis and characterization of random skew and jitter in a novel clock network

Gutnik, Vadim (2000)

  • Advisor: Anantha P. Chandrakasan
  • Department of Electrical Engineering and Computer Science
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Towards low-power yet high-performance networks-on-chip

Park, Sunghyu (2014)

  • Advisors: Anantha P. Chandrakasan; Li-Shiuan Peh
  • Department of Electrical Engineering and Computer Science
Read it