Theses most similar to On-Chip Network exploration and synthesis (Chen, Chia-Hsi; 2012) read it

High-speed, economical design implementation of transit network router

Hara, Kazuhiro (1995)

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An energy efficient AES engine with DPA-resistance

Chung, Hye Won (2009)

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ATAC : A 1000-core cache coherent processor with on-chip optical network

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Low-swing signaling for energy efficient on-chip networks

Park, Sunghyu (2011)

  • Advisors: Anantha P. Chandrakasan; Li-Shiuan Peh
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Design space exploration of photonic interconnects

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  • Advisor: Vladimir Stojanovic
  • Department of Electrical Engineering and Computer Science
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Low-power and application-specific SRAM design for energy-efficient motion estimation

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Towards low-power yet high-performance networks-on-chip

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  • Advisors: Anantha P. Chandrakasan; Li-Shiuan Peh
  • Department of Electrical Engineering and Computer Science
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Design and implementation of low-latency, low-power reconfigurable on-chip networks

Chen, Chia-Hsi (2017)

  • Advisor: Li-Shiuan Peh
  • Department of Electrical Engineering and Computer Science
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BlueCache : a scalable distributed flash-based key-value store

Xu, Shuotao (2016)

  • Advisor: Arvind
  • Department of Electrical Engineering and Computer Science
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