Theses most similar to Multi-layer three-dimensional silicon electronics enabled by wafer bonding (Tan, Chuan Sen; 2006) read it
Wafer bonding of processed Si CMOS VLSI and GaAs for mixed technology integration
Barkley, Edward Robert, 1977- (2001)
- Advisor: Clifton G. Fonstad, Jr.
- Department of Electrical Engineering and Computer Science
- Advisor: L. Rafael Reif
- Department of Electrical Engineering and Computer Science
Characterization and requirements for Cu-Cu bonds for three-dimensional integrated circuits
Tadepalli, Rajappa, 1979- (2007)
- Advisor: Carl V. Thompson, II
- Department of Materials Science and Engineering
Study of sub-0.5 [mega]-m SOI-with-active-substrate (SOIAS) technology for ultra-lower power applications
Yang, Isabel Y. (Isabel Ying) (1996)
- Advisor: Dimitri A. Antoniadis
- Department of Electrical Engineering and Computer Science
Commercialization of low temperature copper thermocompression bonding for 3D integrated circuits
Nagarajan, Raghavan (2008)
- Advisors: Carl V. Thompson, II; Chee Lip Gan
- Department of Materials Science and Engineering
Wafer bonding for monolithic integration of Si CMOS VLSI electronics with III-V optoelectronic devices
London, Joanna M., 1974- (1998)
- Advisor: Clifton G. Fonstad, Jr.
- Department of Electrical Engineering and Computer Science
Single- and few-layer graphene by ambient pressure chemical vapor deposition on nickel
Reina Ceeco, Alfonso (2010)
- Advisor: Jing Kong
- Department of Materials Science and Engineering
Low temperature lithographically patterned metal oxide transistors for large area electronics
Wang, Annie I. (Annie I-Jen), 1981- (2011)
- Advisor: Akintunde Ibitayo (Tayo) Akinwande
- Department of Electrical Engineering and Computer Science
- Advisor: L. Rafael Reif
- Department of Electrical Engineering and Computer Science
Fabrication of capacitors based on silicon nanowire arrays generated by metal-assisted wet chemical etching
Zheng, We (2016)
- Advisor: Carl V. Thompson, II
- Department of Materials Science and Engineering